Energy efficient co-adaptive instruction fetch and issue
Alper Buyuktosunoglu, Tejas Karkhanis, et al.
ISCA 2003
Simultaneous multithreading (SMT) as a processor design to achieve higher levels of system and application throughput is a well-accepted and deployed technique in most desktop and server processors. We study the power implications of varying SMT levels i.e., thread counts per core for various multi-threaded applications on a real SMT multicore platform, and introduce a novel software mechanism of changing SMT level of a core to tune platform power. Power-shifting policies by varying per core SMT levels for performance benefits within a power cap are introduced. Projected power savings (of 15%) for a streaming parallel benchmark can be attained using SMT-level power shifting mechanisms. © 2002-2011 IEEE.
Alper Buyuktosunoglu, Tejas Karkhanis, et al.
ISCA 2003
YongKang Zhu, David H. Albonesi, et al.
ISPASS 2005
Joseph Sharkey, Alper Buyuktosunoglu, et al.
ISLPED 2007
Carlos Luque, Miquel Moreto, et al.
PACT 2009