Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
The large number of coupled lines in an interconnect structure is a serious limiting factor in simulating high-speed circuits. A new method is presented for simulation of large interconnects based on the transverse partitioning concept and waveform relaxation techniques. The computational complexity of the proposed algorithm grows linearly with the number of coupled lines. In addition, the algorithm is highly suitable for parallel implementation leading to further significant reduction in the computational complexity. © 2004 IEEE.
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
Francesco Ferranti, Michel Nakhla, et al.
IEEE T-MTT
Dipanjan Gope, Albert Ruehli, et al.
IEEE Topical Meeting EPEPS 2004
Bruce Archambeault, Albert Ruehli
EMC 2001