A 5.6-100K, 128ppm/K Cryo-CMOS Current Reference
Subhajit Ray, David Frank, et al.
VLSI Technology and Circuits 2025
A test structure suite to measure circuit delays, power, and operating margins of single flux quantum (SFQ) circuits and to derive key parameters directly from dc testable high-speed circuits is described. This suite comprises a set of ring oscillators and a time-differential experiment as well as isolated circuit components. Measured data are compared to the results obtained from circuit simulations conducted in a design environment used for more complex chip designs. This approach, which enables tracking of process technology and validation of device and circuit models in a self-consistent manner, is inspired by a similar methodology for silicon technology deployed successfully by IBM and its alliance partners.
Subhajit Ray, David Frank, et al.
VLSI Technology and Circuits 2025
Jean-Olivier Plouchart, Dereje Yilma, et al.
RFIC 2022
Mark B. Ketchen, Manjul Bhushan, et al.
ICMTS 2009
Kevin Tien, Ken Inoue, et al.
DATE 2022