Conference paper
Scaled-footprint ultra-low power cryogenic InGaAs/InP HEMTs with record-high combination of low-noise and high-frequency performance
Abstract
In this work we demonstrate cryogenic In HEMTs with highly scaled gate footprints, down to 380 x 40 nm2 for a single gate finger, and investigate the impact of footprint scaling on device performance. The 80% In channel devices show f_{MAX} together with a noise indication factor at 4 K, which is a record-high combination of high-frequency and low-noise performance. The performance is enabled by heterostructure engineering, resulting in ultra-low SS < 10 mV/decade $. These results show that cryogenic III-V HEMT technology can provide excellent performance at scaled footprints for readout in future high-density quantum systems.