Editorial

01 Jun 2021

RFIC 2020 Guest Editorial

Conference paper

An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS

Mark Ferriss, Jean-Olivier Plouchart, et al.

VLSI Circuits 2012

Paper

A 250-mW 60-GHz CMOS Transceiver SoC Integrated with a Four-Element AiP Providing Broad Angular Link Coverage

Bodhisatwa Sadhu, Alberto Valdes-Garcia, et al.

IEEE JSSC

Conference paper

Enhanced multilayer organic packages with embedded phased-array antennas for 60-GHz wireless communications

Xiaoxiong Gu, Dong Gun Kam, et al.

ECTC 2013

Paper

W-band dual-polarization phased-array transceiver front-end in SiGe BiCMOS

Arun Natarajan, Alberto Valdes-Garcia, et al.

IEEE T-MTT

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