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Control store implementation of a high performance VLSI CISC
J.H. Chang, H.H. Chao, et al.
MICRO Annual Workshop 1987
Conference paper
ON THE SYNCHRONIZATION OF A MICROPROCESSOR.
Abstract
The design of synchronization circuits for microprocessors is described. A parallel synchronization scheme has been developed to improve the system performance. This novel synchronication scheme has been implemented in the design of the bus controller of Micro-370, a 32-bit microprocessor. The performance of the bus controller has been increased by a factor of two with a power increase of less than 20% as compared with that of a design using conventional schemes.
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