Marco Bellini, Peng Cheng, et al.
SPIE International Symposium on Fluctuations and Noise 2007
An in-situ doped polysilicon emitter process for very shallow and narrow emitter formation and minimum emitter resistance is presented. An in-situ doped film has been imbedded between two undoped poly spacer layers as a buried diffusion source (BDS) to reduce the emitter resistance and to form a high-quality poly/monosilicon interface. Transistors with an emitter area of 0.25 x 0.25 μm2 and with nearly ideal I- V characteristics were fabricated. A very high cutoff frequency of 53 GHz and a minimum ECL gate delay of 26 ps have been achieved using BDS-poly emitter transistors with an emitter area of 0.35 x 4.0 μm2. © 1991 IEEE
Marco Bellini, Peng Cheng, et al.
SPIE International Symposium on Fluctuations and Noise 2007
Emmanuel F. Crabbé, James H. Comfort, et al.
IEEE Electron Device Letters
Joachim N. Burghartz
ESSDERC 1997
John D. Cressler
Microelectronic Engineering