Conference paper
35 GHz/35 psec ECL pnp technology
J. Warnock, P.F. Lu, et al.
IEDM 1990
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400MHz microprocessor.
J. Warnock, P.F. Lu, et al.
IEDM 1990
Y. Mii, S. Rishton, et al.
VLSI Technology 1993
P. Solomon, M. Shamsa, et al.
IEDM 2007
D. Singh, Keith A. Jenkins, et al.
Electronics Letters