X. Cai, T. Kloks, et al.
Networks
The problem considered here is that of permuting the pins of modules in order to maximize the number of connections which can be achieved in the polysilicon level. Using a graph-theoretic formulation, the problem is shown to be equivalent to that of removing fewest edges in a certain graph to break all cycles. The problem is proved to be NP-complete. A heuristic based on branch-and-bound is proposed. © 1984.
X. Cai, T. Kloks, et al.
Networks
J. Nievergelt, J. Pradels, et al.
Information Processing Letters
C.K. Wong, P.C. Yue
Information Sciences
Jiaofeng Pan, Yu-Liang Wu, et al.
Integration, the VLSI Journal