C. Chiang, C.K. Wong, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The problem considered here is that of permuting the pins of modules in order to maximize the number of connections which can be achieved in the polysilicon level. Using a graph-theoretic formulation, the problem is shown to be equivalent to that of removing fewest edges in a certain graph to break all cycles. The problem is proved to be NP-complete. A heuristic based on branch-and-bound is proposed. © 1984.
C. Chiang, C.K. Wong, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Martine D. F. Schlag, Ellen J. Yoffa, et al.
IEEE TCADIS
C.K. Wong
Trans. Am. Math. Soc.
Yuh-Zen Liao, C.K. Wong
IEEE TCADIS