Susumu Horiguchi, Takeo Nakada
Journal of Parallel and Distributed Computing
Functional verification is one of the most important and labor-intensive aspects of the entire hardware design cycle, whose cost can reach 50-70% of the overall design development effort. Throughout its history, functional verification faced many challenges and utilized many opportunities to advance its methodologies and technologies that were needed to address the growing complexity of hardware designs. In this lightning talk, I will briefly describe the evolution of functional verification focusing on the growing automation of the process. Then I will discuss some of the challenges we are facing and how new opportunities from the fields of machine-learning and data science can help continue the evolution of functional verification.
Susumu Horiguchi, Takeo Nakada
Journal of Parallel and Distributed Computing
Weiming Hu, Nianhua Xie, et al.
IEEE TPAMI
Bing Zhang, Mikio Takeuchi, et al.
ICAIF 2024
Dzung Phan, Vinicius Lima
INFORMS 2023