Conference paper
Synthesis of fully testable sequential machines
R. Thomas, Sandip Kundu
European Conference on Design Automation 1992
A small change in the input to logic synthesis may cause a large change in the output implementation. This is undesirable if a designer has some investment in the old implementation and does not want it perturbed more than necessary. We describe a method that solves this problem by reusing gates from the old implementation, and restricting synthesis to the modified portions only.
R. Thomas, Sandip Kundu
European Conference on Design Automation 1992
Sandip Kundu
ICCD 1994
Sandip Kundu, Sudhakar M. Reddy, et al.
ICCAD 1987
D. Brand
ACM SIGPLAN Notices