Ruixiong Tian, Zhe Xiang, et al.
Qinghua Daxue Xuebao/Journal of Tsinghua University
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
Ruixiong Tian, Zhe Xiang, et al.
Qinghua Daxue Xuebao/Journal of Tsinghua University
Heinz Koeppl, Marc Hafner, et al.
BMC Bioinformatics
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
Rajiv Ramaswami, Kumar N. Sivarajan
IEEE/ACM Transactions on Networking