Khaled A.S. Abdel-Ghaffar
IEEE Trans. Inf. Theory
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
Khaled A.S. Abdel-Ghaffar
IEEE Trans. Inf. Theory
David A. Selby
IBM J. Res. Dev
Gal Badishi, Idit Keidar, et al.
IEEE TDSC
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990