Gal Badishi, Idit Keidar, et al.
IEEE TDSC
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
Gal Badishi, Idit Keidar, et al.
IEEE TDSC
M.J. Slattery, Joan L. Mitchell
IBM J. Res. Dev
Maurice Hanan, Peter K. Wolff, et al.
DAC 1976
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009