Evolution of Interconnect Metallurgy and Future Roadmap

Scaling of logic/memory devices is required to meet the necessity of improvement of AI chips. Accordingly, interconnects which had scaled down for a few decades through innovations to minimize interconnect RC, secure production yield and reliability need further scaling. In this article,after briefly reviewing evolutions of Cu interconnect metallurgy, the latest innovations which have been implemented in the most advanced LSI’s will be reviewed, followed by the future BEOL technology roadmap.