Conference paper
FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
A new approach for encoding any string of information bits into a sequence having bounded running digital sum is presented. The results improve previously known values of the running digital sum for the same rate. Also discussed are ways of incorporating error-correcting capability into these codes. Some general constructions are given and tables are constructed for specific cases. © 1993 IEEE
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
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