Efficient Stack Simulation for Set-Associative Virtual Address Caches With Real Tags

Stack simulation is a powerful cache analysis approach to generate the number of misses and write backs for various cache configurations in a single run. Unfortunately, none of the previous work on stack simulation has efficient stack algorithm for virtual address caches with real tags (V/R-type caches). In this paper, we devise an efficient stack simulation algorithm for analyzing V/R-type caches. Using markers with a valid range for synonym lines, our algorithm is able to keep track of stack distances for different cache configurations. In addition to cache miss ratios and write back ratios, our approach generates pseudonym frequency for all cache configurations under investigation. © 1995 IEEE