R. Ghez, M.B. Small
JES
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
R. Ghez, M.B. Small
JES
Q.R. Huang, Ho-Cheol Kim, et al.
Macromolecules
E. Burstein
Ferroelectrics
J.R. Thompson, Yang Ren Sun, et al.
Physica A: Statistical Mechanics and its Applications