S. Gates, A. Grill, et al.
ADMETA 2006
Grain growth of Cu interconnects in a low-k dielectric was achieved at an elevated anneal temperature of 300 °C without stress-migration-related reliability problems. For this, a TaN metal passivation layer was deposited on the plated Cu overburden surface prior to the thermal annealing process. As compared to the conventional anneal process at 100 °C, the passivation layer enabled further Cu grain growth at the elevated temperature, which then resulted in an increased Cu grain size and improved electromigration resistance in the resulted Cu interconnects. © 2012 IEEE.
S. Gates, A. Grill, et al.
ADMETA 2006
C.-K. Hu, J. Ohm, et al.
ADMETA 2011
T. Nogami, S. Nguyen, et al.
IEDM 2021
Chih-Chao Yang, B. Li, et al.
IEEE Electron Device Letters