Tze-Chiang Chen, Kai-Yap Toh, et al.
IEEE Electron Device Letters
This paper presents a study on the custom design of dense bipolar programmable-logic-array (PLA) circuits. Technology issues and circuit choices are addressed and the trade-offs between density and performance are discussed. It is concluded that device density is of key importance to the overall circuit density of a PLA. A very dense PLA can be designed with its decoder implemented using merged transistor logic (MTL) circuits and array crosspoints using butted-emitter transistor layout. Copyright © 1987 by The Institute of Electrical and Electronics Engineers, Inc.
Tze-Chiang Chen, Kai-Yap Toh, et al.
IEEE Electron Device Letters
Siegfried K. Wiedmann, Denny D. Tang
ISSCC 1981
John D. Cressler, James Warnock, et al.
IEEE Electron Device Letters
Denny D. Tang, Catherine Wong, et al.
IEEE Electron Device Letters