The dielectric breakdown in gate oxides under high field stress
S. Lombardo, J.H. Stathis, et al.
ECS Meeting 2009
The measurement of defects at the silicon-insulator interface by most spectroscopic techniques is difficult because of their low concentration. A novel structure has been fabricated by etching a dense array of deep trenches through a silicon wafer. All the sidewalls in this structure are {111} surfaces, and the surface area is greatly enhanced compared to that of a polished wafer of equivalent size. We have grown an oxide on this structure and have achieved better than an order of magnitude increase in the sensitivity of electron paramagnetic resonance measurements of Pb defects at the SiO 2-Si(111) interface.
S. Lombardo, J.H. Stathis, et al.
ECS Meeting 2009
S.J. La Placa, P.W.R. Corfield, et al.
Solid State Communications
L. Kuhn, M.L. Dakss, et al.
Applied Physics Letters
R. Rodríguez, J.H. Stathis, et al.
Microelectronics Reliability