Copper-filled through wafer vias with very low inductance

The inductance of through-wafer vias in a new via technology in silicon is reported. The technology uses copper filled vias with 70 μm diameters. Measurements by network analyzer up to 40 GHz show that the vias have inductance of approximately 0.15 pH/μm, the smallest reported value for vias in silicon. © 2005 IEEE.