Jau-Yi Wu, Win-San Khwa, et al.
VLSI Technology 2015
We have examined Cu 2ZnSnSe 4 (CZTSe) solar cells prepared by thermal co-evaporation on Mo-coated glass substrates followed by post-deposition annealing under Se ambient. We show that the control of an interfacial MoSe 2 layer thickness and the introduction of an adequate Se partial pressure (P Se) during annealing are essential to achieve high efficiency CZTSe solar cells-a reverse correlation between device performance and MoSe 2 thickness is observed, and insufficient P Se leads to the formation of defects within the bandgap as revealed by photoluminescence measurements. Using a TiN diffusion barrier, we demonstrate 8.9 efficiency CZTSe devices with a long lifetime of photo-generated carriers. © 2012 American Institute of Physics.
Jau-Yi Wu, Win-San Khwa, et al.
VLSI Technology 2015
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Physical Review B - CMMP
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IEEE International SOI Conference 2010
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