Lishing Liu, Jih-Kwon Peir
IEEE Transactions on VLSI Systems
One critical aspect in designing set-associative cache at high clock rate is deriving timely results from directory lookup. In this paper we investigate the possibility of accurately approximating the results of conventional directory search with faster matches of few partial address bits. Such fast and accurate approximations may be utilized to optimize cache access timing, particularly in a customized design environment. Through analytic and simulation studies we examine the trade-offs of various design choices. We also discuss few other applications of partial address matching to computer designs.
Lishing Liu, Jih-Kwon Peir
IEEE Transactions on VLSI Systems
Lishing Liu
IEEE Transactions on VLSI Systems
David Bernstein, Doron Cohen, et al.
MICRO 1994
Kien A. Hua, Lishing Liu, et al.
IEEE TC