Tak H. Ning, Peter W. Cook, et al.
IEEE JSSC
Traditional high speed bipolar transistors are not compatible with thin silicon-on-insulator substrates that are used for low power-delay product CMOS manufacturing. This paper discusses an SOI-CMOS compatible, vertical bipolar transistor from its inception to experimental verification on 120nm SOI. Unique electrical characteristics, such as breakdown behavior and substrate bias dependency, are examined in detail and correlated to simple theory. Future directions and prospects of complementary SOI-BiCMOS are outlined. © 2004 IEEE.
Tak H. Ning, Peter W. Cook, et al.
IEEE JSSC
Marco Bellini, Bongim Jun, et al.
IEEE TNS
Tak H. Ning
VLSI-TSA 2013
Pouya Hashemi, Jeng-Bang Yau, et al.
IEEE J-EDS