P. Pleshko, T.J. Thomas
IEEE Transactions on Magnetics
The design and performance characteristics of a 128X64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time. Copyright © 1966 by The Institute of Electrical and Electronics Engineers, Inc.
P. Pleshko, T.J. Thomas
IEEE Transactions on Magnetics
A. Deutsch, G.V. Kopcsay, et al.
IEEE Topical Meeting EPEPS 1995
L.M. Terman, L.G. Heller
IEEE T-ED
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