Conference paper
Substrate coupling noise issues in silicon technology
Keith A. Jenkins
SiRF 2004
The variability of CMOS device propagation delay is measured with a special test circuit. The circuit detects AC delay variations, as distinct from the DC effect of threshold voltage variation. The AC variability is likely due to the vertical resistance of the gate-stack. A comparison of two technologies, using gate-first and gate-last gate-stacks, shows much reduced variability of the gate-last FETs. This is attributed to the absence of interfacial dopant fluctuation and the presence of tailored metallic interfaces in gate-last technologies.
Keith A. Jenkins
SiRF 2004
Karthik Balakrishnan, Keith Jenkins
ICMTS 2014
Stas Polonsky, Keith A. Jenkins
ISDRS 2003
Pouya Hashemi, Takashi Ando, et al.
VLSI Technology 2016