Conference paperNew digital circuit techniques for total standby leakage reduction in nano-scale SOI technologyKoushik K. Das, Rajiv V. Joshi, et al.ESSCIRC 2003
Conference paperHigh-performance device optimization and dual-VT technology options for doublegate FETAditya Bansal, Keunwoo Kim, et al.ICICDT 2007
Conference paperAnalysis and design of digital CMOS circuits in hybrid SOI-epitaxial technology with different crystal orientationsKoushik K. Das, Shih-Hsien Lo, et al.IEEE International SOI Conference 2004
Conference paperNovel high-density low-power high-performance double-gate logic techniquesMeng-Hsueh Chiang, Keunwoo Kim, et al.IEEE International SOI Conference 2004
