Suyoung Bang, Jae-Sun Seo, et al.
IEEE JSSC
A switched-capacitor voltage regulator (SCVR) that dithers flying capacitance (CFLY) to reduce output ripple is presented. The proposed technique is implemented in a 40-phase SCVR with 4b CFLY modulation in 65nm CMOS. At 2.3V input, on-chip ripple magnitude of 6∼16mV at 1V output is measured for 11∼142mA load. Peak efficiency is 70.8% at a power density of 0.187W/mm2.
Suyoung Bang, Jae-Sun Seo, et al.
IEEE JSSC
Arnab Neelim Mazumder, Jian Meng, et al.
IEEE JESTCS
Zhenyu Wang, Pragnya Sudershan Nalla, et al.
VLSI-TSA 2023
Alessandro Cevrero, Cosimo Aprile, et al.
VLSI Circuits 2015