Bodhisatwa Sadhu, Yahya Tousi, et al.
IEEE JSSC
An integrated dc-dc converter with two passive external components was designed and fabricated in an advanced, short-channel (Leff < 0.2 μm, Vdd < 2 V) CMOS technology. This design was undertaken to examine the feasibility of implementing an inductive buck converter with passive components small enough to fit entirely within a packaged chip. High switching frequencies (> 10 MHz) were used to minimize the size of external components, and novel circuits were used to reduce the stress on the short channel devices. Measured efficiencies for a 3.3 V to 1.65 V converter were approximately 75% for output currents from 15 to 40 mA.
Bodhisatwa Sadhu, Yahya Tousi, et al.
IEEE JSSC
Scott K. Reynolds, Christopher J. Smart, et al.
Applied Physics Letters
Alberto Valdes-Garcia, Bodhisatwa Sadhu, et al.
CICC 2018
Vibhor Jain, T. Kessler, et al.
BCTM 2014