Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Two FinFET fabrication processes are compared with simulation: the conventional fin-first process and the novel fin-last process. With the fin-last process, more longitudinal strain can be incorporated into the channel from source and drain SiGe stressor than fin-first. pFET mobility advantage is 15% at fully-strained condition and with silicon recess. Maintaining vertical junction uniformity is the main challenge for fin-last. However, its impact on parasitic resistance and capacitances are small. Vertical junction non-uniformity is improved with source and drain recess and doping optimization. © 2013 IEEE.
Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Raymond Wu, Jie Lu
ITA Conference 2007
Pradip Bose
VTS 1998
Ehud Altman, Kenneth R. Brown, et al.
PRX Quantum