A 1.92μm Pitch Current-Controlled Oscillator ADC Array Featuring Charge-Injection-Based Two-Stage Conversion for In-Memory Computing

A 63-channel 2-stage charge-injection (CI) current-controlled oscillator (CCO) ADC array is presented for in-memory computing. Implemented in 22nm FDSOI, the ADC improves linearity and speed over conventional CCO ADCs by adopting CI-cells and a two-stage architecture. It achieves 8b resolution with 33ns latency, consuming 198uW with a 33fJ/conv FOM. The proposed ADC achieves a pitch of 1.92 um, enabling high-density integration for in-memory computing. The proposed ADC is validated through system-level measurement for ML tasks.